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Signal Flow Analysis

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Signal Flow Analysis and Re-Design in Telecommunication Systems


Background


The importance of embedded real-time systems for our daily life is rapidly increasing. One important field of application for embedded real-time systems is in the telecommunications industry. The complexity of these systems is rapidly growing while at the same time the software part is becoming more and more important. The E-CARES research project is a coopertaion between Ericsson Eurolab Deutschland GmbH (EED) and the Department of Computer Science III, RWTH Aachen. E-CARES is an acronym for Ericsson Communication ARchitecture for Embedded Systems.

Eighty percent of programming resources are allocated to maintaining and reengineering existing code. Our project concerns understanding and restructuring of complex legacy systems from the telecommunication domain. Such systems are real-time embedded systems using the signaling paradigm, thus they pose additional requirements regarding fault tolerance, reliability, availability, and response time.

Problem


In the first phase of our reengineering project we regarded the architecture modeling and the reverse engineering of telecommunication systems. The aim was to understand complex legacy systems. Current work concerns the restructuring of such systems including their redesign and reimplementation. The challenge is to provide concepts, languages, methods, and tools to improve the architecture of software, make software easier to understand, and help to find bugs. After the source code of the given system was parsed and analysed, we obtain a graph representation of the software architecture. By using a redesign tool the engineer is able to interactively modify the system.

This diploma thesis concerns the signal flow analysis between different software units of the Ericsson Software System AXE 10. Thereby, a special concept called “Communication Buffer” should take center stage. First, the student should introduce the concept and purpose of such buffers. Afterwards, the student ought to consider concepts to visualize such buffers inside the redesign tool. In doing so, the goal is to track possible link chains towards the different software units and to display such chains inside the redesign tool. Furthermore, the student should observe if there are possibilities to optimize the link chains, for example by abbreviating them.

The approach should consider different modeling languages, e.g. Progres and Fujaba.

Requirements


The following lectures are helpful:
  • Einführung in die Softwaretechnik
  • Compilerbau


Betreuer
Dipl.-Inform. Christof Mosler (Raum 4219)
Bearbeiter
André Kamp

Created by: christof last modification: Friday 25 of May, 2007 [09:05:25 UTC] by christof